A CMOS-Compatible, low-energy consumption Franz-Keldysh effect Plasmonic Modulator Active Region

In this abstract we report on the design of a low energy consumption CMOS-compatible FranzKeldysh effect plasmonic modulator. The main characteristics of the modulator were determined using integrated electro-optical simulations. A 3.3 dB extinction ratio for a 30 μm long modulator was demonstrated under 3 V bias voltage at an operation wavelength of 1647 nm. The estimated energy consumption was as low as 20 fJ/bit. This is the lowest energy consumption reported with photonic Franz-Keldysh effect modulators. The structure of the modulator proposed is presented in Fig. 1. It consists in a classical vertical MIS plasmonic slot waveguide formed by Copper (Cu), Silicon Nitride (Si3N4) and Germanium (Ge). The Si3N4 diffusion barrier has a thickness hSlot and the Ge core has a width w and a height h. Such a structure stands on a p-doped Ge (p-Ge) layer of height hBot which is over a p-doped Si layer (p-Si) of height hBuf. Everything is encapsulated by SiO2. The structure has two electrical contacts: one in the top Cu material and the other in the p-Ge and p-Si. Such a structure is CMOS-compatible, as it can be fabricated on a SOI substrate using microelectronics tools. Fig. 1: Cross section of the Franz-Keldysh effect plasmonic modulator The active principle of the modulator is to use the Franz-Keldysh (FK) effect [1,2] in order to modulate the plasmonic mode supported by the slot waveguide. The FK effect is the change in absorption that a material experiences under the influence of a static electric field. The change in the absorption occurs close to the band-edge energy of the material, i.e. at the wavelength of 1647 nm in strained Ge grown on silicon. This slot waveguide supports a plasmonic mode whose electric field is concentrated mainly in the Si3N4 slot and in the Ge core. When a voltage V is applied between the contacts, a static electric h Slot